American tech company AMD previewed its upcoming high-performance CPU for servers to enthusiasts earlier this week. The CPU is called 'Naples' and is expected to be able to deliver superior memory bandwidth putting in a number of high-speed input and output channels in just one single chip.
AMD teases its new Naples CPU for servers. The new CPU is designed to scale across cloud data center and traditional on-premise server configurations. It is expected to stand out among CPUs for servers currently available in the market with its high-performance capabilities. One particular use of the CPU would be to conduct a seismic analysis.
The Naples is said to have 60 percent more input and output capacity, 45 percent more cores, and 122 percent more memory bandwidth than server CPUs available now. The American tech company claims that the new CPU will be able to deliver the admired Zen x86 processing engine in 32-core configurations.
Features of the CPU include a 32-core System on Chip (SoC) design with support for two high-performance threads per core and above standard memory bandwidth. It will also have a highly-optimized cache structure for high-performance and energy-efficient computing and dedicated security hardware. The CPU's memory bandwidth will have room for 32 DIMMs on server boards.
The process is complete SoC with integrated high-speed I/O capacity. The I/O capacity is able to support 128 lanes of PCIe 3.0 which means that there is no need for a separate chipset.
When compared to Intel's current 88-threaded Xeon E5-2699A V4 processor, the Naples has more memory channels, memory capacity, and RAM frequency. It even has more PCIe 3.0 lanes.
It is expected that the Naples will be talked about at two AMD presentations on its data center strategy at the Open Compute Summit. One presentation will be handled by enterprise solutions vice president Scott Taylor on March 8 at 4:55 PM PST in the main all. The other will be by done by enterprise products senior director Dan Bounds the next day at 9:20 AM PST on the Expo Hall stage.
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